The present invention relates generally to two-level caches, and more particularly to synchronization of a two-level cache in a graphics processing system.
Graphics processing systems process large amounts of data. This data is often texture data. Textures represent surface qualities of geometric objects, and are used to provide increased realism in 3D graphics. Texture information is often stored in the form of texture maps with the texture map being comprised of texture elements (texels). Texels are used in conjunction with geometric information of an object to determine color and intensity of a pixel displayed on a display device. Often multiple texels from a single texture map are used, or blended, to determine the display characteristics of a pixel. In addition, at times texels from more than one texture map are used to determine the display characteristics of any one pixel. Therefore, color and intensity of a single pixel may be formed through blending multiple texels and these texels may come from more than one texture map.
Texture data is often resident in system memory. System memory, however, is a shared resource. In computer systems having a dedicated bus for graphics processing systems, other devices may attempt to access data used by the graphics processing system. This may increase data access time for the graphics processing system. In computer systems in which graphics processing system shares a common system bus with other devices, the common bus may be in use by other devices when the graphics processing system attempts to make use of system memory. In addition, requests for data from system memory may take excessive amounts of time. Accordingly, accessing system memory is a potential performance bottleneck for graphics processing systems.
A graphics cache dedicated to storing graphics data is sometimes used to enhance accessibility of graphics data by a graphics processing system. The graphics cache is provided graphics data from the system memory prior to a demand by the graphics processing system. The graphics system, therefore, has the graphics data available for use when desired, thereby reducing the need to promptly access system memory and reducing problems associated with memory latency.
A graphics cache, however, is often too small to store an entire texture map. Increasing the size of the graphics cache to allow for storage of an entire texture map is not always a viable solution. Increasing the size of the graphics cache may result in decreased performance as cache access time generally increases with cache size. In addition, increased cache size requires increased space within a chip, and chip space is often at a premium.
In order to provide increased cache size without significantly affecting cache performance, caches for central processing units (CPUs) are sometimes in the form of two-level caches. In a two-level cache a first level cache makes data readily available to a user of the data, such as a graphics engine. A second level cache, generally containing significantly more data, supplies data to the first level cache. The use of a two-level cache provides benefits in terms of increased data availability and decreased memory access time. The use of a two-level cache, however, also creates issues with respect to the transfer of the data to, and the deletion of data from, the cache system.
Beneficially, data most likely to be immediately required for use by the user is present in the level one cache, with data likely to be required for use in the near future in the level two cache. By transferring appropriate portions of the texture map between the two caches, the graphics processing system can have the data available in the graphics cache, resulting in reduced memory access time. Without appropriate determination of which data to transfer, and which data to overwrite, however, the benefits of a two-level cache may be reduced.